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  1. NOVA - Home

    chipMason (tm) tool set is a chip floorplanning and rapid silicon prototyping ED A toolset that supports package/chip co-design, hierarchical design flow and ...
    verilog1
    electronic design automation1
    eda software1
    system on chip1
    floorplanning1
    chip physical design1
    design re-use1
    hierar chical design1
    repeater allocation1
    top level routing1

    novasemi.chipeda.com - 2009-04-08

  2. COREUM - Home

    chipMason (tm) tool set is a chip floorplanning and rapid silicon prototyping ED A toolset that supports package/chip co-design, hierarchical design flow and ...
    verilog1
    electronic design automation1
    eda software1
    system on chip1
    floorplanning1
    chip physical design1
    design re-use1
    hierar chical design1
    repeater allocation1
    top level routing1

    www.coreum.com - 2009-02-04

  3. Concept Engineering - We make things visible

    Homepage of Concept Engineering. We provide advanced schematic generation technology, available as software components as well as standalone software tools
    EDA1
    EDA software1
    Concept Engineering1
    EDA components1
    netlist to schematic1
    schematic generation1
    automatic schematic generation0
    netlist viewing0
    netlist visualization0
    schematic browsing0
    schematic viewing0

    www.concept.de - 2009-02-07

  4. GDSII Layout Viewer - LSymTech

    Layout GDSII OASIS Viewer for EDA chip flow.
    mask2
    polygon1
    chip design1
    GDSII1
    EDA software1
    OASIS Layout Viewer0

    www.lsymtech.com - 2009-02-13

  5. EDA News | EDA Pages

    EDA news: EDApages is an EDA industry news and EDA blog news site that is dedicated to the EDA electronic design, processor news and EDA software tools market. ...
    vlog1
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    DO-2541
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    asic news0
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    processor news0

    www.edapages.com - 2009-02-10

  6. Atoptech - Breaking the Bounds of Physical Design - Home

    News / Articles · 01/26/09 ATopTech Closes Successful 2008, Reaches Revenue Milestone · 07/15/08 SCDsource: ATopTech takes a fresh approach to place and route · 0 ...
    extraction2
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    formal verification1
    ARM Reference flow1
    characterization to silicon1
    Floorplan Synthesis1
    low power design1
    Aprisa1
    automated chip creation0

    www.atoptech.com - 2009-02-12

  7. Magma Design Automation, Co.,Ltd. - Integrated RTL to GDSII Design and Analysis Solutions

    Advanced RTL-to-GDSII electronic design and physical verification software for SoCs, ASICs and structured ASICs, and FPGAs, with special capabilities for 90 ...
    extraction2
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    opc2
    rtl2
    yield1
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    formal verification1
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    low power design1
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    verilog.1

    www.magma-da.co.jp - 2009-04-07

  8. Magma - Digital Design

    Jump to content Worldwide Sites Worldwide Sites Magma Japan Magma China Magma Taiwan Sales MOLTEN Online Support Contact Us RSS Products and Solutions Digital ...
    analog2
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    CTS2
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    www.blastcreate.com - 2009-02-10

  9. Magma - Quartz RC

    Jump to content Worldwide Sites Worldwide Sites Magma Japan Magma China Magma Taiwan Sales MOLTEN Online Support Contact Us RSS Products and Solutions Digital ...
    analog2
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    gdsii1
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    Floorplan Synthesis1
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    TSMC Reference flow1
    analog simulation1
    chemical mechanical polishing1
    clock tree synthesis1
    critical area analysis1

    www.magma-mobility.com - 2009-02-06

  10. Magma - Global Training

    Jump to content Worldwide Sites Worldwide Sites Magma Japan Magma China Magma Taiwan Sales MOLTEN Online Support Contact Us RSS Products and Solutions Digital ...
    analog2
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    caa1
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    gdsii1
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    characterization to silicon1
    Floorplan Synthesis1
    analog IP migration1
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    design ahead of the curve1
    hierarchical design1
    TSMC Reference flow1
    analog simulation1
    chemical mechanical polishing1
    clock tree synthesis1
    critical area analysis1

    www.magmatraining.com - 2009-02-08

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